1. Field of the Invention
This invention relates generally to the field of semiconductor device manufacturing and, more particularly, to a method and apparatus for detecting faults using principal component analysis parameter groupings.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the quality, reliability and throughput of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for higher quality computers and electronic devices that operate more reliably. These demands have resulted in a continual improvement in the manufacture of semiconductor devices, e.g., transistors, as well as in the manufacture of integrated circuit devices incorporating such transistors. Additionally, reducing the defects in the manufacture of the components of a typical transistor also lowers the overall cost of integrated circuit devices incorporating such transistors.
Generally, a set of processing steps is performed on a lot of wafers using a variety of processing tools, including photolithography steppers, etch tools, deposition tools, polishing tools, rapid thermal processing tools, implantation tools, etc. The technologies underlying semiconductor processing tools have attracted increased attention over the last several years, resulting in substantial refinements. However, despite the advances made in this area, many of the processing tools that are currently commercially available suffer certain deficiencies. In particular, such tools often lack advanced process data monitoring capabilities, such as the ability to provide historical parametric data in a user-friendly format, as well as event logging, real-time graphical display of both current processing parameters and the processing parameters of the entire run, and remote, i.e., local site and worldwide, monitoring. Additionally, in some instances adequate metrology data cannot be collected due to uncertainties regarding what parameters to measure, the impossibility of measuring certain parameters, or cost concerns. These deficiencies can engender non-optimal control of critical processing parameters, such as throughput, accuracy, stability and repeatability, processing temperatures, mechanical tool parameters, and the like. This variability manifests itself as within-run disparities, run-to-run disparities and tool-to-tool disparities that can propagate into deviations in product quality and performance, whereas an ideal monitoring and diagnostics system for such tools would provide a means of monitoring this variability, as well as providing means for optimizing control of critical parameters.
The manufacture of semiconductor products, such as microprocessors and flash memory devices, requires a distinct sequence of individual operations to be performed on silicon wafers in order to produce final products that meet certain electrical performance requirements. In some cases, electrical measurements that determine the performance of the fabricated devices are not conducted until relatively late in the fabrication process, and sometimes not until the final test stage.
The inline semiconductor operations, such as processing and metrology, have been historically monitored by charting univariate data. The processes would be considered abnormal when one or more of the measurements were outside an allowable range of values. In contrast, if the measurements were inside the allowable range, they would be assumed to be processed correctly.
However, as the volume of wafers produced and the amount of available data has increased, monitoring individual measurements has become time consuming, and sometimes, impracticable. Additionally, correlation among parameters reduces the ability of univariate statistical process control (SPC) to detect certain types of faults.
Despite the quantity of data that is collected as wafers are processed down the manufacturing line, the inline parameters do not provide a complete picture as to how all of the devices will perform when they are electrically tested at the end of the line. Even when individual processes are performing within their specifications, poor electrical performance can result due to cumulative effects from multiple tools and operations. Additionally, some process disturbances are undetected because of inadequacies in the fault detection and classification (FDC) system or due to the existence of disturbances that cannot be measured by existing technology.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.